Wire bonding and flip chip mounting have been proposed as methods for mounting a semiconductor chip. FIG. 28A illustrates a cross-sectional view of a flip chip mounted to a laminated substrate 100. In the flip chip mounting, a semiconductor chip 110 is mounted face down on the substrate 100 and connected to the substrate 100 through bumps 111. When high density mounting is required, a bonding pad is unnecessary for the periphery of semiconductor chip 110 and the flip chip which requires less occupation area on the substrate 100 of the semiconductor chip 110 is suitable. Moreover, as illustrated in FIG. 28B, as the flip chip structure to the single layer substrate 120, the chip 110 is allocated over the substrate 120 and bumps 111 and wires 121 are joined.
As a multilayer wiring substrate 100 for flip chip mounting required to realize high density wiring, interlayer continuity is realized not by using a through-hole (TH) which is provided through all layers but by an inner via-hole (IVH) 101 which may be individually arranged for each layer for enabling high density wiring. The inner via-hole (IVH) 101 can be formed to the laminated substrate which is represented by a ceramics multilayer substrate. The ceramics multiplayer substrate can be manufactured, as illustrated in FIG. 29, through the boring process of insulation base material, paste printing process, simultaneous laminating process, and simultaneous thermal baking process.
In recent years, a mobile computer is more and more required to realize reduction in size through the high density mounting technology because of increase in various control computers due to introduction of sophisticated functions of automobile (using electronic circuits) and reduction in mounting space of computer due to the requirement for expansion of the residential space. Therefore, for actual mounting of the semiconductor chip, adaptation of the flip chip bonding technology is required to realize higher density mounting. However, in the flip chip bonding, the substrates 100 and 120 and semiconductor chip 110 are bonded, as illustrated in FIGS. 28A and 28B, via a very small gap G (20 μm to 70 μm) through the bump 111. Therefore, stress generated due to difference in the line expansion coefficients of the semiconductor chip 110 and substrates 100 and 120 is concentrated to the bonding area of the bump 111 and substrates 100 and 120, resulting in the problem that the connecting portion is broken when the applied temperature is repeatedly changed. Because of such problem, application into such mobile computer to be placed under the severe operation environment becomes difficult.